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Surface Potential-Based Polycrystalline-Silicon Thin-Film Transistors Compact Model by Nonequilibrium Approach
http://hdl.handle.net/2241/120079
http://hdl.handle.net/2241/120079ca9f00ba-ce1f-40ed-9f7e-36243b22d23a
名前 / ファイル | ライセンス | アクション |
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IEEETED_60-10.pdf (525.5 kB)
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Item type | Journal Article(1) | |||||
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公開日 | 2013-11-19 | |||||
タイトル | ||||||
タイトル | Surface Potential-Based Polycrystalline-Silicon Thin-Film Transistors Compact Model by Nonequilibrium Approach | |||||
言語 | ||||||
言語 | eng | |||||
資源タイプ | ||||||
資源 | http://purl.org/coar/resource_type/c_6501 | |||||
タイプ | journal article | |||||
著者 |
Ikeda, H.
× Ikeda, H.× Sano, N. |
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著者別名 |
佐野, 伸行
× 佐野, 伸行 |
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抄録 | ||||||
内容記述タイプ | Abstract | |||||
内容記述 | We propose a surface potential-based polycrystalline silicon thin-film transistors (poly-Si TFTs) compact model considering a nonequilibrium state. A drain current model considers grain boundary (GB) trap-related physical phenomena: composite mobility of GB and intragrain, GB bias-induced mobility modulation, transient behavior because of carrier capture and emission at GBs, pinch off voltage lowering, and GB trap-assisted leakage current. Besides, photoinduced current behavior is also considered by introducing quasi-Fermi potential. A capacitance model is derived from physically partitioned terminal charges and coupled to the drain current. This compact model allows us to accurately simulate static characteristics of various types of poly-Si TFTs, including temperature and luminance dependence. Furthermore, it succeeded to simulate frequency dependence of circuit performance derived from the trap-related transient behavior, which was verified by evaluating delay time in a 21-stage inverter chain. | |||||
書誌情報 |
IEEE transactions on electron devices 巻 60, 号 10, p. 3417-3423, 発行日 2013-10 |
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ISSN | ||||||
収録物識別子タイプ | ISSN | |||||
収録物識別子 | 0018-9383 | |||||
書誌レコードID | ||||||
収録物識別子タイプ | NCID | |||||
収録物識別子 | AA00667820 | |||||
DOI | ||||||
識別子タイプ | DOI | |||||
関連識別子 | 10.1109/TED.2013.2278274 | |||||
権利 | ||||||
権利情報 | ©2013 IEEE | |||||
著者版フラグ | ||||||
値 | author | |||||
出版者 | ||||||
出版者 | IEEE | |||||
URI | ||||||
識別子 | http://hdl.handle.net/2241/120079 | |||||
識別子タイプ | HDL |