{"created":"2021-03-01T07:07:55.816394+00:00","id":29440,"links":{},"metadata":{"_buckets":{"deposit":"a5dbc755-c59d-47e6-bb9a-f8e2bfb532a6"},"_deposit":{"id":"29440","owners":[],"pid":{"revision_id":0,"type":"depid","value":"29440"},"status":"published"},"_oai":{"id":"oai:tsukuba.repo.nii.ac.jp:00029440","sets":["117:137","3:62:5591:599"]},"item_5_biblio_info_6":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicIssueDates":{"bibliographicIssueDate":"2013-10","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"10","bibliographicPageEnd":"3423","bibliographicPageStart":"3417","bibliographicVolumeNumber":"60","bibliographic_titles":[{"bibliographic_title":"IEEE transactions on electron devices"}]}]},"item_5_creator_3":{"attribute_name":"著者別名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"佐野, 伸行"}],"nameIdentifiers":[{},{},{}]}]},"item_5_description_4":{"attribute_name":"抄録","attribute_value_mlt":[{"subitem_description":"We propose a surface potential-based polycrystalline silicon thin-film transistors (poly-Si TFTs) compact model considering a nonequilibrium state. A drain current model considers grain boundary (GB) trap-related physical phenomena: composite mobility of GB and intragrain, GB bias-induced mobility modulation, transient behavior because of carrier capture and emission at GBs, pinch off voltage lowering, and GB trap-assisted leakage current. Besides, photoinduced current behavior is also considered by introducing quasi-Fermi potential. A capacitance model is derived from physically partitioned terminal charges and coupled to the drain current. This compact model allows us to accurately simulate static characteristics of various types of poly-Si TFTs, including temperature and luminance dependence. Furthermore, it succeeded to simulate frequency dependence of circuit performance derived from the trap-related transient behavior, which was verified by evaluating delay time in a 21-stage inverter chain.","subitem_description_type":"Abstract"}]},"item_5_identifier_34":{"attribute_name":"URI","attribute_value_mlt":[{"subitem_identifier_type":"HDL","subitem_identifier_uri":"http://hdl.handle.net/2241/120079"}]},"item_5_publisher_27":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"IEEE"}]},"item_5_relation_11":{"attribute_name":"DOI","attribute_value_mlt":[{"subitem_relation_type_id":{"subitem_relation_type_id_text":"10.1109/TED.2013.2278274","subitem_relation_type_select":"DOI"}}]},"item_5_rights_12":{"attribute_name":"権利","attribute_value_mlt":[{"subitem_rights":"©2013 IEEE"}]},"item_5_select_15":{"attribute_name":"著者版フラグ","attribute_value_mlt":[{"subitem_select_item":"author"}]},"item_5_source_id_7":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"0018-9383","subitem_source_identifier_type":"ISSN"}]},"item_5_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AA00667820","subitem_source_identifier_type":"NCID"}]},"item_creator":{"attribute_name":"著者","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Ikeda, H."}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Sano, N."}],"nameIdentifiers":[{}]}]},"item_files":{"attribute_name":"ファイル情報","attribute_type":"file","attribute_value_mlt":[{"accessrole":"open_date","date":[{"dateType":"Available","dateValue":"2014-05-09"}],"displaytype":"detail","filename":"IEEETED_60-10.pdf","filesize":[{"value":"525.5 kB"}],"format":"application/pdf","licensetype":"license_note","mimetype":"application/pdf","url":{"label":"IEEETED_60-10.pdf","url":"https://tsukuba.repo.nii.ac.jp/record/29440/files/IEEETED_60-10.pdf"},"version_id":"961b057d-7071-453a-adbd-b056b471330f"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"eng"}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourcetype":"journal article","resourceuri":"http://purl.org/coar/resource_type/c_6501"}]},"item_title":"Surface Potential-Based Polycrystalline-Silicon Thin-Film Transistors Compact Model by Nonequilibrium Approach","item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"Surface Potential-Based Polycrystalline-Silicon Thin-Film Transistors Compact Model by Nonequilibrium Approach"}]},"item_type_id":"5","owner":"1","path":["137","599"],"pubdate":{"attribute_name":"公開日","attribute_value":"2013-11-19"},"publish_date":"2013-11-19","publish_status":"0","recid":"29440","relation_version_is_last":true,"title":["Surface Potential-Based Polycrystalline-Silicon Thin-Film Transistors Compact Model by Nonequilibrium Approach"],"weko_creator_id":"1","weko_shared_id":5},"updated":"2022-04-27T08:57:18.787298+00:00"}